This invention relates to a DC (direct current) stress supply circuit, and more particularly to a DC stress supply circuit for directly measuring an amount that a speed delay per an unit gate measured from a ring oscillator is varied by the degradation of an unit element owing to hot carriers.
In general, In semiconductor memory devices such as dynamic random access memories (DRAMs) or static random access memories (SRAMs), the hot carriers degrade the property of the device to reduce the operation speed of the semiconductor memory device. It should analyze the degradation due to hot carriers in manufacturing the semiconductor memory device.
The property degradation of the device due to hot carriers is very insignificant in a normal voltage condition. Conventionally, because the ratio of degradation due to hot carriers is several percents during ten years, the degradation of the device is measured by supplying the stress voltage higher than the normal voltage to the device where the degradation is to be measured. The measurement method is called as an acceleration test.
However, the acceleration test is hardly possible to measure the degradation of the unit element by supplying different conditions to each of the unit elements in a circuit level which is comprised of the unit elements. It is because in the respective unit element constituting the circuit, for example a transistor, the drain voltage and the gate voltage are not arbitrarily adjustable and because it is impossible to supply a certain hot carrier stress to the respective unit element. Therefore, in the prior, the indirect method that supplies the stress voltage to the circuit level by the hot carrier acceleration measurement method once and draws model parameters of the respective unit elements and then analyzes the device degradation through computer simulation using the model parameters, is utilized.
However, because the computer simulation method using the model parameters is not a direct analysis method but an indirect analysis method to device degradation in the circuit level, the error between the experimental data and the substantial data is large and it takes a long time to test the individual elements.
It is an object of the present invention to provide a DC stress supply circuit which includes terminals for supplying stress from the exterior and a switch for selecting an operation mode and directly measures the whole degradation of the operation speed of a circuit by directly supplying hot carriers to elements constituting the circuit.
According to an aspect of the present invention, there is provided to DC stress supply circuit in a semiconductor circuit having unit elements, comprising: a plurality of DC stress supply means for providing DC stress signals to the unit elements of the semiconductor circuit; and a plurality of switching means for controlling the DC stress signals from the DC stress supply means to be provided to the unit elements in accordance with control signals.
In the DC stress supply circuit, the plurality of the DC stress supply means provide the DC stress signals to the unit elements, respectively. The plurality of DC stress supply means are commonly connected to a common terminal, thereby providing one of the DC stress signals to all the unit elements of the semiconductor circuit. Of the plurality of DC stress supply means, even means are commonly connected to an even common terminal and odd means are commonly connected to an odd common terminal, respectively.